Main advantages of multicellular architecture
- It enhances performance and at the same time reduces energy consumption
- There is no need for compliated controlling units such as brunch prediction, out-of-sequence command execution etc., therefore it reduces considerably the size of the chip.
Fault Tolerance (сontinuous program running in case of hardware environment break-down - cells failure)
- Dynamic reconfiguration (in the process of task performance 1,2,3 or 4 cells can be involved, while uninvolved cells can perform other tasks)
Super security of information
Natural virus immunity
Multicellular architecture features
- "Natural" implementation of parallelism (without solving the problem of parallelizing)
- Program execution without recompilation for any quantity of cells
- Effective settlement of any class of problems (commutation environment doesn't limit intercellular data exchange)
- Significant reduction of memory accesses during execution of task
The multicellular architecture differs from the von Neumann model by the direct indication of informational connections between operations and consequently any requirement for the ordered arrangement of the operation description in the program is annulled.
It is different from the well known non-von Neumann architectures by means of sequential fetching which realizes imperative programming languages as well as by dynamically generated tags, but not instruction addresses of indicating informational connections. Any instruction is executed at the “data readiness” and “its output users’ readiness”.
The cell instruction set is based upon some intermediate presentation of a compiled program after the syntax analysis (triads) and actually it is a sort of hardware realization of input programming language. It minimizes the labour costs to create compilers due to the fact that the units of machine-oriented optimization and paralleling disappear as well as the instruction generating unit dramatically decreases. The notion "assembler programming" disappears as the processor language is not visible and thus it is “not programmable”. The software becomes really hardware-independent.
Comparison with analogs:
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